Senior ASIC RTL Design Engineer, AI Hardware

Job summary

Responsibilities

As a senior front-end design engineer, you will be a key part of the world-class team designing and developing the next generations of the Cerebras Wafer Scale Engine (WSE). This role requires deep expertise in RTL design and integration, with a strong focus on delivering high-performance…

• Drive all aspects of chip design, including Functional Specification, Micro-architecture, RTL development, Synthesis.
• Work closely with PD team members for design closure to meet PPA goals.
• Work closely with Design verification and DFT teams for achieving the best functional and test coverage.
• Work with software and system teams to understand opportunities to deliver optimal performance and feature set for the product.
• Debug silicon-level functional, timing, and power issues during bring up.

Tech stack

• Python